All-Digital Frequency Synthesizer in Deep-Submicron CMOS by Robert Bogdan Staszewski

By Robert Bogdan Staszewski

A brand new and leading edge paradigm for RF frequency synthesis and instant transmitter designLearn the options for designing and imposing an all-digital RF frequency synthesizer. not like conventional RF innovations, this leading edge publication units forth digitally extensive layout strategies that paved the way to the improvement of inexpensive, low-power, and hugely built-in circuits for RF features in deep submicron CMOS techniques. additionally, the authors display how the structure permits readers to combine an RF front-end with the electronic back-end onto a unmarried silicon die utilizing regular ASIC layout flow.Taking a bottom-up procedure that gradually builds abilities and data, the ebook starts off with an creation to uncomplicated strategies of frequency synthesis after which publications the reader via an all-digital RF frequency synthesizer design:Chapter 2 provides a digitally managed oscillator (DCO), that is the basis of a unique structure, and introduces a time-domain version used for research and VHDL simulationChapter three provides a hierarchical layer of mathematics abstraction to the DCO that makes it more uncomplicated to function algorithmicallyChapter four builds a section correction mechanism round the DCO such that the system's frequency flow or wander functionality suits that of the solid exterior frequency referenceChapter five provides an program of the all-digital RF synthesizerChapter 6 describes the behavioral modeling and simulation method utilized in designThe ultimate bankruptcy provides the implementation of a whole transmitter and experimental effects. the radical principles awarded the following were carried out and confirmed in high-volume, advertisement single-chip radios constructed at Texas tools: Bluetooth and GSM.While the focal point of the ebook is on RF frequency synthesizer layout, the options might be utilized to the layout of alternative digitally assisted analog circuits to boot. This publication is a must-read for college kids and engineers who are looking to study a brand new paradigm for RF frequency synthesis and instant transmitter layout utilizing digitally in depth layout options.

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The resulting frequency of the tracking mode is set by Eq. 2. The mode progression following the process in Fig. 9 contains two modeswitching events during which the center frequency is shifted rapidly closer and closer to the desired frequency. At the end of the PVT and acquisition modes, the terminating-mode capacitor state is frozen and it now constitutes a new center frequency ( fcP or fcA ) from which, during the subsequent tracking mode, the frequency offsets are calculated. 6 EXAMPLE IMPLEMENTATION 45 EXAMPLE IMPLEMENTATION The frequency tuning of a DCO is accomplished by means of the quantized capacitance of an LC tank oscillator.

However, intensive SPICE simulation still has to be carried out to ensure that the target frequency band remains achievable under PVT variations. Specific transistor sizing and layout design of the oscillator have to be “handcrafted” as the design specification or process changes [32]. 28 Phase-domain PLL. ) The applications described above have much more relaxed requirements on the phase noise and spurious content than those of RF wireless applications. In fact, they are all based on a ring oscillator structure which inherently features relatively poor phase-noise characteristics.

A conventional deepsubmicron CMOS technology designed for logic applications has been shown to exhibit useful RF device characteristics [39]. Scaling of CMOS devices increases the 1=f flicker noise, which is caused by carrier trapping near the thin oxide – silicon interface. This phenomenon is absent in bipolar transistors. The flicker noise could be converted into close-in phase noise of voltage-controlled oscillators (VCOs) and appear at the output of down-conversion mixers. Fortunately, as shown in [37], this noise frequency translation mechanism can be avoided through half-circuit topological symmetry.

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